TY - CONF
TI - An approach to fast hierarchical fault simulation
T2 - Design Automation Conference(DAC)
SP - 698
EP - 703
AU - Urano
AU - Masuda
AU - Motohara
AU - Sugano
AU - Murakami
PY - 1988
KW - fault insertion
KW - logic design environment
KW - hierarchical fault simulation
KW - simulation-model generation
KW - lookup tables
KW - behavioral description
KW - switch-level truth tables
DO - 10.1109/DAC.1988.14845
JO - Design Automation Conference(DAC)
SN - 0-8186-0864-1
VO - 10.1109/DAC.1988.14845
VL - 00
JA - Design Automation Conference(DAC)
Y1 - June 1988
ER -